Autonomous lithography: hit overlay, CD and focus before you print.
Lithera is Waferira's autonomous litho-and-overlay agent.
Products
Buy the module that hurts. Add the rest when it pays.
Waferira ships as five products mapped to the fab, not to abstract capabilities. Lithera controls the litho cell, Vmetra measures every wafer virtually and closes APC on etch, deposition, CMP and implant, Scanira is the inspection backbone, Dispira runs dispatch and handling, and Fabtwin validates every move first. Start with one on the Module tier and expand as each proves its number.
Illustrative scenario: Module M2 · 300 mm · metal-1 · lot L-48213, one lot through metal-1, one approval gate
The five
One stack, five products, one record
Scanira sees the wafer. Vmetra predicts metrology on every wafer and closes run-to-run APC. Lithera controls the hardest, costliest step. Fabtwin simulates process and flow and validates every candidate action before the lot runs. Dispira optimises yield-weighted WIP and dispatch and physically moves the wafers. Every product feeds the others and shares one fab-edge runtime, one tenant-isolated corpus and the same connectors.
See every defect, particle and reticle excursion before it scraps the lot.
Scanira is Waferira's autonomous defect-and-inspect agent.
Measure every wafer virtually, and close the loop on etch, deposition, CMP and implant.
Vmetra is Waferira's metrology-and-virtual and process-control agent.
Hit target yield, uniformity and cycle time before the lot runs.
Fabtwin is Waferira's as-run wafer and fab digital twin.
Autonomous WIP, dispatch and wafer handling for maximum yield-weighted throughput.
Dispira is Waferira's yield-and-dispatch and robot-and-handling agent.
Lithera · ■ brand #6D28D9
Lithera
Autonomous lithography: hit overlay, CD and focus before you print.
The problem
Photolithography is the yield-defining, most expensive step in the fab. Nanometer overlay, critical-dimension and focus-dose budgets shrink every node, and OPC and computational-litho mask correction plus litho APC are among the heaviest compute workloads in manufacturing. Overlay drift, focus-exposure excursions and CD non-uniformity silently scrap lots worth hundreds of thousands each, while scanner recipes, correctables and mask decks are tuned by a scarce, overloaded litho-engineering craft that cannot keep up with tool and metrology volume.
What Lithera does
Lithera is Waferira's autonomous litho-and-overlay agent. It runs GPU-accelerated computational lithography for source-mask context, predicts overlay, CD and focus response per scanner, reticle and layer, and closes run-to-run and advanced process control by writing corrected correctables and focus-dose recipes over SECS/GEM, validated in Fabtwin before the lot runs and grounded by Vmetra virtual metrology and Scanira inline defect signals.
Who it is for
Logic, memory, analog and specialty IDMs and foundries; scanner, litho-cell and OPC and EDA vendors; litho and integration engineering teams at advanced and mature-node fabs.
Key features
- Closed-loop overlay, CD and focus-dose APC with per-scanner, per-layer correctables
- GPU computational-litho (OPC and ILT) context for mask-aware control
- Focus-exposure-matrix and overlay-drift prediction with excursion holds
- Fabtwin-validated recipe moves, as-run against as-designed, before execution
- Reticle and lot-genealogy-linked litho audit trail with citations
NVIDIA stack
Named in the product brief as the current design
DGX or HGX H100 and H200Jetson OrinCUDA and cuDNNTensorRTTritonOmniverseNVIDIA AI Enterprise and NIM
Planned
cuLitho · plannedGB200 and Blackwell · planned
Why it needs a GPU
OPC and ILT computational lithography and litho response modelling are among the most GPU-intensive workloads in all of manufacturing, and real-time correctable write-back needs TensorRT at the scanner. CPU-only cannot run mask-aware computational litho or twin-coupled optimisation at fab cadence.
MVP scope and first metric
Advisory overlay, CD and focus-dose optimisation on one litho cell using existing scanner APC and metrology data; graduate to closed-loop correctable write-back with Fabtwin validation. First metric: overlay and CD capability and lot-scrap reduction on one cell.
Tier. Module tier, $30,000 per litho module or tool fleet per month, expanding to Fab and Enterprise.
Open questions
- cuLitho access and computational-litho fidelity targets are design targets, not measured
- Per-fab scanner and OPC integration depth varies
Scanira · ■ brand #0891B2
Scanira
See every defect, particle and reticle excursion before it scraps the lot.
The problem
A wafer passes 700 to 1,500 steps, and a few nanometer-scale particles or pattern defects can destroy an entire lot worth hundreds of thousands to millions. Inline optical, e-beam and SEM inspection generate enormous high-resolution imagery, yet defect review, classification and disposition are still largely manual, engineer-bound and reactive, so yield-limiting excursions are caught late, nuisance defects flood review, and the scarce defect and yield engineering workforce drowns in images while lots keep moving.
What Scanira does
Scanira is Waferira's autonomous defect-and-inspect agent. Fab-edge vision fuses optical, e-beam, SEM and inline-inspection streams to classify and predict defects, particles and yield-limiting excursions in real time, auto-dispositions nuisance against killer defects, triages reticle and pattern excursions, and raises inline holds, feeding classified signals to Vmetra, Lithera and Dispira and grounding every call in the tenant-isolated defect corpus with citations.
Who it is for
Logic, memory, analog and specialty IDMs and foundries; inspection and metrology equipment OEMs (optical, e-beam, SEM); defect, yield and reticle engineering teams.
Key features
- Real-time multi-modal defect and particle classification: optical, e-beam and SEM fusion
- Killer-versus-nuisance auto-disposition with priority defect triage
- Reticle and pattern excursion detection and inline-hold recommendations
- Yield-limiting-excursion prediction linked to wafer and lot genealogy
- Citation-grounded, IP-isolated defect audit trail
NVIDIA stack
Named in the product brief as the current design
Jetson OrinH100 and HGXIGX and HoloscanMetropolis and DeepStreamTensorRTTritonNVIDIA AI Enterprise and NIMFleet Command
Planned
Jetson Thor · plannedCosmos and Omniverse Replicator at scale · planned
Why it needs a GPU
High-resolution optical, e-beam and SEM imagery and multi-stream sensor fusion demand massive parallel inference and training, and real-time triage needs TensorRT on Jetson or IGX. CPU-only cannot classify inspection imagery at production throughput or at the sub-200 ms triage latency in the design.
MVP scope and first metric
Advisory defect classification and killer-or-nuisance disposition on one inspection cell using existing ADC imagery; graduate to real-time triage, inline holds and reticle-excursion detection. First metric: review-load and scrap reduction on one cell.
Tier. Module tier, $30,000 per inspection module or tool fleet per month, expanding to Fab and Enterprise.
Open questions
- E-beam and SEM data access and labelling depth vary by fab
- Synthetic rare-defect coverage targets are design targets
Vmetra · ■ brand #059669
Vmetra
Measure every wafer virtually, and close the loop on etch, deposition, CMP and implant.
The problem
Physical metrology is slow, sampled and expensive, so most wafers and steps go unmeasured while etch and deposition uniformity, CMP removal and dishing, implant dose and thermal budgets drift between measurements. Run-to-run and advanced process control run on sparse metrology and siloed FDC, so excursions are caught late, correctables lag, and process and yield engineers manually stitch tool-sensor, metrology and yield data together.
What Vmetra does
Vmetra is Waferira's metrology-and-virtual and process-control agent. It predicts metrology for etch, deposition, CMP, implant, clean and diffusion from tool-sensor and FDC signatures on every wafer, scores excursion risk in real time, and closes run-to-run and advanced process control by writing corrected recipes over SECS/GEM, grounded by Scanira defect signals, validated in Fabtwin, and feeding Lithera and Dispira.
Who it is for
Logic, memory, analog and specialty IDMs and foundries; APC, metrology and FDC software and equipment vendors; process-integration, metrology and yield engineering teams.
Key features
- Per-wafer virtual metrology for etch, deposition, CMP, implant, clean and diffuse
- Closed-loop run-to-run and advanced process control with recipe write-back
- FDC and time-series prognostics with real-time excursion-risk scoring
- Fabtwin-validated correctable moves before execution
- Genealogy-linked, IP-isolated metrology and APC audit trail
NVIDIA stack
Named in the product brief as the current design
H100 and HGXJetson OrinDGXCUDA and RAPIDSTensorRTTritonOmniverseNVIDIA AI Enterprise and NIM
Planned
Cosmos and Omniverse Replicator for rare excursions · planned
Why it needs a GPU
High-volume multivariate tool-sensor and FDC time-series scoring, virtual-metrology inference on every wafer and frequent fleet retraining are accelerated-computing workloads, and edge latency needs TensorRT on Jetson. CPU-only cannot score per-wafer virtual metrology at production cadence or retrain across the fleet.
MVP scope and first metric
Advisory virtual metrology and excursion scoring on one module using existing FDC and metrology data; graduate to closed-loop run-to-run recipe write-back with Fabtwin validation. First metric: metrology-sampling reduction and excursion catch rate on one module.
Tier. Module tier, $30,000 per process module or tool fleet per month, expanding to Fab and Enterprise.
Open questions
- FDC and tool-sensor instrumentation depth varies by tool and fab
- Synthetic rare-excursion coverage targets are design targets
Fabtwin · ■ brand #2563EB
Fabtwin
Hit target yield, uniformity and cycle time before the lot runs.
The problem
Fabs commit multi-month, multi-million-dollar lots and node ramps largely blind. New recipes, process integrations, WIP moves and dispatch changes are tried in production, where a bad move scraps lots and burns cycle time. There is no as-run, physics- and flow-accurate model of the whole fab to test candidate process, metrology and dispatch decisions before execution, so process and yield engineers rely on craft, spreadsheets and costly split-lot experiments.
What Fabtwin does
Fabtwin is Waferira's as-run wafer and fab digital twin. It fuses process (litho, etch, deposition, CMP, implant, thermal) and flow (WIP, tools, AMHS, routes) into an Omniverse-based twin that simulates candidate recipes, correctables, WIP and dispatch moves, as-run against as-designed, and returns the yield, uniformity and cycle-time outcome before the lot runs. It is the validation and what-if layer for Lithera, Vmetra, Scanira and Dispira, and it stores every simulated-versus-qualified decision as process-qualification memory.
Who it is for
Logic, memory, analog and specialty IDMs and foundries; new-fab and node-ramp teams; process integration, industrial engineering and yield-management organisations; MES and scheduling vendors.
Key features
- Omniverse as-run process and flow twin, as-run against as-designed
- Pre-execution simulation of recipe, correctable, WIP and dispatch moves
- Yield, uniformity and cycle-time prediction with confidence and holds
- Twin-validated action gating for every Waferira agent
- Process-qualification memory: simulated, approved, qualified
NVIDIA stack
Named in the product brief as the current design
DGX and OVXH100 and HGXOmniverse and OpenUSDCUDA and ModuluscuOptTritonNVIDIA AI Enterprise and NIM
Planned
GB200 and Blackwell for full-fab, full-node twins · plannedOmniverse Cloud · planned
Why it needs a GPU
Physics-ML process surrogates, thousands to tens of thousands of daily process and dispatch simulations and real-time twin rendering are overwhelmingly GPU-bound. CPU-only cannot run twin-coupled optimisation or full-fab simulation at the cadence autonomy requires.
MVP scope and first metric
A flow twin plus a single-process surrogate validating dispatch and one recipe change against historical lots; graduate to a multi-process as-run twin gating all agent actions. First metric: scrap and cycle-time saved on one node ramp or process change.
Tier. Sold inside Fab ($220,000 per month) and Enterprise as the twin and validation layer; node-ramp and new-fab twin engagements in the $2M to $20M ACV range.
Open questions
- Process-surrogate fidelity and OVX access targets are design targets
- MES and AMHS data completeness varies by fab
Dispira · ■ brand #EA580C
Dispira
Autonomous WIP, dispatch and wafer handling for maximum yield-weighted throughput.
The problem
A fab runs thousands of tools and lots through 700 to 1,500 steps under hard constraints: reticle availability, chamber state, tool qualification, route priority, hot lots and cycle-time targets. Dispatch and scheduling are still largely rule-based and engineer-tuned, so WIP bubbles, tool starvation and cycle-time misses erode throughput and on-time delivery, while FOUP, AMHS and wafer handling run on fixed logic blind to real-time yield and excursion risk.
What Dispira does
Dispira is Waferira's yield-and-dispatch and robot-and-handling agent. It optimises WIP, scheduling, dispatch and cycle-time balancing with GPU-accelerated constrained optimisation, weighting moves by live yield and excursion risk from Scanira and Vmetra, and drives robotic FOUP, AMHS and wafer handling, all validated in Fabtwin before committing. It closes the physical and flow loop of the fab.
Who it is for
Logic, memory, analog and specialty IDMs and foundries; AMHS, robotics and MES and scheduling vendors; industrial-engineering, operations and logistics teams.
Key features
- GPU-accelerated WIP, dispatch, scheduling and cycle-time optimisation
- Yield- and excursion-risk-weighted move prioritisation from Scanira and Vmetra
- Robotic FOUP, AMHS and wafer-handling perception and control
- Fabtwin-validated dispatch and route decisions before commit
- Genealogy-linked, IP-isolated dispatch and handling audit trail
NVIDIA stack
Named in the product brief as the current design
Jetson OrinH100 and HGXDGXcuOptRAPIDSIsaac Sim and Isaac ROSTensorRTOmniverseNVIDIA AI Enterprise, NIM and Fleet Command
Planned
Jetson Thor · planned
Why it needs a GPU
Constrained fab-scale dispatch re-optimised every one to five minutes across reticle, chamber, route and tool constraints, plus real-time robot perception, are accelerated-computing workloads. CPU-only cannot re-optimise fab-scale dispatch at cadence or run low-latency AMHS perception.
MVP scope and first metric
Advisory dispatch optimisation weighted by yield and excursion signals in one fab area; graduate to closed-loop dispatch and Isaac-driven AMHS and wafer-handling autonomy with Fabtwin validation. First metric: cycle time and on-time delivery in one area.
Tier. Sold inside Fab ($220,000 per month) and Enterprise as the dispatch and handling layer; enterprise multi-fab dispatch and AMHS programmes.
Open questions
- AMHS and robot integration and fab layout data vary by site
- Jetson Thor availability and edge-robot scope are planned
Compare
What is in each tier
Products are licensed per module or tool fleet on the Module tier and bundled on Fab and Enterprise.
| Capability | Module | Fab | Enterprise |
|---|---|---|---|
| Modules covered | 1 | All in the fab | All fabs in the group |
| Agents | 1 of 5 products | All agents | All agents + custom models |
| As-run fab twin (Fabtwin) | No | Included | Custom process and flow models |
| Fab-edge node | Included | Per module | Fleet managed |
| Bounded recipe writes | Qualified window, one module | All qualified windows | Group policy |
| Wafer and lot genealogy | Included | Included | Included + export |
| Autonomy levels | L1 to L2 | L1 to L3 | L1 to L4 on qualified loops |
| SSO and RBAC | No | Planned | Planned, with approval chains |
| On-prem control plane | No | Optional | Included |
| Support | Business hours | 24/7 | 24/7 + named engineer |
| Indicative price | $30,000/mo | $220,000/mo | $2M to $20M ACV |
Run timeline · scenario
The five products in one lot
Every Waferira run is an ordered, inspectable sequence. This is run_7b2e9c on Module M2 · 300 mm · metal-1 · lot L-48213. Scenario completes in 10 steps with one approval gate. Overlay and CD predicted inside spec, one reticle-repeater signature caught and held for review, dispatch re-optimised, lot released with full genealogy.
run_7b2e9c
Module M2 · 300 mm · metal-1 · lot L-48213
illustrative scenario
SUCCEEDED
-
01
ingest.lot
SUCCEEDED
0.7 s
Fab Orchestrator · Pulled lot L-48213 from fab MES: 25 wafers, 300 mm, metal-1 layer, route, reticle, overlay and CD spec and the standing cycle-time target. Locked the target envelope for the run.
-
02
twin.simulate
SUCCEEDED
38 s
Fab Twin · Simulated 64 candidate correctable, recipe and dispatch sets on the as-run fab twin and ranked them on predicted overlay residual, CD uniformity, excursion risk and cycle time.
-
03
litho.correctables
SUCCEEDED
1 m 20 s
Litho-and-Overlay · Per-field overlay correctables and a focus-dose trim written to scanner SCN-07 over SECS/GEM after the previous lot's residual trended toward the control limit. Predicted overlay residual back inside spec.
-
04
etch.uniformity
SUCCEEDED
58 s
Etch-and-Depo · Chamber B on etcher ETCH-12 showed an edge-fast uniformity drift in FDC. Pressure and RF trims written within the qualified recipe window; predicted CD uniformity recovered.
-
05
cmp.removal
SUCCEEDED
46 s
CMP-and-Implant · Downforce and platen-speed trim on CMP-03 against the virtual removal-rate estimate to hold post-CMP thickness and dishing inside the window.
-
06
inspect.classify
SUCCEEDED
continuous
Defect-and-Inspect · Inline optical, e-beam review and SEM imagery fused at the tool edge. 1,412 events classified, most dispositioned nuisance; one reticle-repeater signature on three dies flagged for review.
-
07
vm.score
SUCCEEDED
2.1 s
Metrology-and-Virtual · Virtual metrology scored every wafer at post-etch and post-CMP from tool-sensor and FDC signatures. Two wafers routed to physical metrology on predicted variance; the rest sampled at plan.
-
08
approve.human
APPROVAL
1 m 04 s
Fab Orchestrator · The reticle-repeater signature called for a reticle inspection hold and a recipe move outside the qualified window. Held for the module process engineer and approved at 03:14:27.
-
09
dispatch.route
SUCCEEDED
4.3 s
Yield-and-Dispatch · Dispatch re-optimised across 1,840 lots in WIP under reticle, chamber and qualification constraints. The lot routed to the qualified chamber with the shortest predicted queue; AMHS move issued to the stocker.
-
10
lot.release
SUCCEEDED
1 m 05 s
Quality-and-Conformance · Lot L-48213 moved on: genealogy written (recipe moves, correctables, FDC signatures, VM scores, defect map, approvals) and checked against the layer spec.
Accelerated computing
Physical AI, at the tool
Computational lithography, defect classification on e-beam and SEM imagery, per-wafer virtual metrology and a full-fab twin are among the most compute-intensive workloads in manufacturing. Waferira keeps IP-sensitive inference and feature storage at the fab edge and runs training, simulation and optimisation on GPUs the fab controls.
Inspection vision
Inline optical, e-beam and SEM imagery and sensor fusion on fab-edge GPUs. 10 to 50 inspection streams per pilot module and sub-200 ms priority defect triage are the design targets.
Virtual metrology and FDC
High-volume multivariate tool-sensor and FDC time-series scoring on every wafer, 1 to 5 seconds per lot-step in the design, with nightly retraining as recipes and chambers drift.
Training
Defect, virtual-metrology and process-response models retrained per process family; 500 to 2,000 GPU-hours per family per quarter is the design target. Dedicated capacity is planned.
Fab twin
As-run process and flow simulation, 1,000 to 10,000 candidate recipe, metrology and dispatch scenarios per fab per day in the design. OVX access is planned.
Synthetic rare events
Rare defect, particle, overlay-drift, CMP-dishing and film-uniformity variants generated and validated against real distributions before promotion. Planned.
Dispatch optimisation
Constrained WIP dispatch re-optimised every 1 to 5 minutes across reticle, chamber, route, tool-state and cycle-time constraints.
AMHS and handling
Local FOUP and robot perception and exception detection at the fab edge. Jetson Thor is planned for higher sensor density.
Process reasoning
Tenant-isolated process Q&A and OCAP reasoning over recipes, SEMI procedures and audit logs, with citations enforced on every answer.
Pricing
Priced per module, per fab, per group
Land on one workflow with a measured baseline. Expand by module, tool fleet, fab and autonomy level. Outcome components are available on yield-point value, excursions and cycle time. Annual prepay carries a 15 to 20% discount.
APC, defect or virtual-metrology AI for one module: litho, etch, deposition or CMP. For fabs validating ROI on the wedge, IP-isolated from day one.
- One module or tool fleet, one agent
- Fab-edge inference node included
- SECS/GEM, APC, inspection and metrology connectors
- Run log, IP-isolated audit trail, lot genealogy
- Business-hours support
The whole loop: litho and overlay, etch and deposition, CMP and implant, clean and diffuse, defect, metrology and virtual, yield and dispatch, AMHS and the fab twin.
- All process agents on every module
- Scanira defect autonomy across inspection
- Vmetra virtual metrology and APC fab-wide
- Dispira yield-weighted dispatch and AMHS
- Fabtwin as-run twin gating every action
- 24/7 support, quarterly model review
Multi-fab IDMs and foundries standardising on Waferira, with custom process, device and yield models and a managed fab-edge fleet.
- Multi-fab fleet management
- Custom process, device and yield models
- Fab-edge fleet with on-prem control plane
- Group autonomy policy and approval chains
- SLAs, SSO and RBAC, dedicated engineer
FAQ
Straight answers
The questions fab directors and process engineers ask in the first meeting.
Yes, over SECS/GEM, but only inside the qualified recipe window for that tool, with per-parameter limits and tool-state checks, and only at the autonomy level your fab has set. Level 1 is advisory: Waferira recommends and an engineer enters everything. Design partners start there, in shadow mode.
The tool stays on its own controller and its last qualified recipe. Waferira is a supervisory layer on top of the APC, inspection, metrology and MES systems you already run, never a replacement for them, so an outage leaves the module running the way it runs today.
No. Inference and feature storage stay at the fab edge, recipes, device designs, defect libraries and process memory are isolated per tenant, and an on-prem control plane is available for IP-sensitive fabs. Any cross-fab learning is planned, contract-gated and privacy-preserving, and none of it moves recipes or designs.
Advisory recommendations start from the existing APC, metrology and ADC data on the wedge module. Defect classification, virtual metrology and excursion prediction improve as labelled events and lot outcomes accumulate per process family. Rare excursions are augmented synthetically only after validation against real distributions.
You are, the same as with any APC strategy, which is why every write is policy-checked, bounded to the qualified window, logged and reversible, and why holds, out-of-window moves and lot release wait for a named approver with the OCAP linked.
A paid pilot on one process module or tool fleet, scoped to one wedge workflow with a baseline agreed in writing. Shadow mode first, observing and measuring the baseline. Then assist mode, where the agent recommends and your engineer approves and accuracy and ROI are measured. Then bounded autonomy for low-risk APC, defect or metrology loops if the fab is satisfied.
Get started
Pick your first product
Start with one process module or tool fleet and one measurable baseline. A paid, IP-isolated pilot on defect classification, virtual-metrology-driven overlay and CD control or uniformity APC shows the number before you commit further.