Solutions

Start where the excursions are.

Every fab already measures yield, excursions, scrapped lots, metrology sampling, defect-review hours and cycle time. Waferira lands on one of those numbers, on one module, IP-isolated, with a baseline agreed in writing, and expands when it moves.

6 wedges1 module to startBaseline agreed in writing

run_7b2e9c · agent graph · module M2 · scenario 10 nodes · 1 approval gate
01 · orchestrator ingest.lot ✓ SUCCEEDED 02 · fabtwin twin.simulate ✓ SUCCEEDED 03 · litho_overlay litho.correctables ✓ SUCCEEDED 04 · etch_depo etch.uniformity ✓ SUCCEEDED 05 · cmp_implant cmp.removal ✓ SUCCEEDED 06 · defect_inspect inspect.classify ✓ SUCCEEDED 07 · metrology_vm vm.score ✓ SUCCEEDED 08 · orchestrator approve.human ◆ APPROVAL 09 · yield_dispatch dispatch.route ✓ SUCCEEDED 10 · quality_conf lot.release ✓ SUCCEEDED

Illustrative scenario: Module M2 · 300 mm · metal-1 · lot L-48213, one lot through metal-1, one approval gate

By outcome

Six wedges, each with a metric the fab already has

The first paid pilot targets one of these. The metric column is what the pilot would be judged on.

Defect classification and excursion response

Inspection cells

Fuse inline, e-beam and SEM, disposition killer against nuisance, hold reticle and pattern excursions inline. Metric: review load, excursion catch rate and scrap against the baseline.

Scaniraagent.defect_inspect

Overlay and CD control

Litho cells

Predict overlay and CD response per scanner and layer and write correctables inside the qualified window, grounded by virtual metrology. Metric: overlay and CD capability and lot scrap at litho.

Litheraagent.litho_overlay

Etch and deposition uniformity

Etch and deposition modules

Score every wafer from FDC, catch uniformity drift before physical metrology, trim pressure, RF and time inside window. Metric: excursions caught before metrology and sampling reduced.

Vmetraagent.etch_depo

CMP removal and dishing

CMP modules

Hold removal rate, dishing and erosion from platen telemetry and virtual thickness. Metric: post-CMP thickness variance and rework against the baseline.

Vmetraagent.cmp_implant

WIP, dispatch and cycle time

Whole fab

Re-optimise dispatch under reticle, chamber and qualification constraints, weighted by yield risk, validated on the twin. Metric: cycle time and on-time delivery in one area.

Dispiraagent.yield_dispatch

Node ramps and process changes

New fabs, new nodes

Simulate the recipe change or ramp plan on the as-run twin before lots run; discard candidates that breach the window. Metric: scrap and cycle time on the ramp.

Fabtwintwin.fabtwin
Where it pays

Four loops, four metrics

Waferira is not a dashboard. Each agent closes a loop a fab already measures in yield points, excursions, scrapped lots, review hours and cycle time. The tables show what each loop watches and what it is allowed to move.

Overlay and CD

Correct the scanner before the residual reaches the limit

Overlay residuals and CD drift are predicted per scanner, reticle and layer from metrology and inline defect signals. When the trend heads for the control limit the agent updates correctables and focus-dose inside the qualified window instead of waiting for a rework lot.

  • Overlay, CD and focus-exposure response modelled per scanner and layer
  • Computational-litho context so a correctable move is mask-aware
  • Every correctable and its later yield written into the training set
agent.litho_overlay SUCCEEDED
Correct the scanner before the residual reaches the limit: signals watched and recipes moved
SignalWatchesMoves
Overlay residualPredicted per field from metrology trendPer-field correctables
CDVirtual and sampled metrologyDose trim inside window
FocusFocus-exposure matrix driftFocus offset or hold
Unmeasured wafers

Measure every wafer, virtually

Physical metrology is sampled, so most wafers go unmeasured while uniformity drifts. Vmetra predicts the measurement from tool-sensor and FDC signatures on every wafer, routes the uncertain ones to the metrology tool and hands corrected recipes to the process agents.

  • Virtual thickness, uniformity and removal rate on every wafer
  • Sampling plan driven by predicted variance, not a fixed rate
  • Run-to-run APC fed on every lot-step rather than every sampled one
agent.metrology_vm SUCCEEDED
Measure every wafer, virtually: signals watched and recipes moved
SignalWatchesMoves
Film thicknessPredicted from FDC per waferDeposition time and rate trims via Etch-and-Depo
UniformityPredicted edge-to-centre profilePressure and RF trims inside window
Removal ratePredicted from platen telemetryDownforce and platen trims via CMP-and-Implant
Killer or nuisance

Disposition the defect before the engineer opens the image

Inspection tools produce more images than any review team can look at. Scanira fuses optical, e-beam and SEM at the tool edge, classifies each event, auto-dispositions nuisance against killer, and raises a hold on a reticle or pattern excursion while the lot is still in the module.

  • Optical, e-beam and SEM fused into one classification
  • Reticle repeater and pattern excursion detection with inline holds
  • Rare defect classes augmented synthetically and validated against real distributions
agent.defect_inspect SUCCEEDED
Disposition the defect before the engineer opens the image: signals watched and recipes moved
SignalWatchesMoves
Defect eventsClassified and dispositioned in real timeHold recommendation, signal to control agents
Reticle repeatersSame field position across diesReticle inspection hold via approval
Particle excursionsTool and step correlationSignal to Clean-and-Diffuse and dispatch
Cycle time

Rehearse the dispatch, then move the lot

Dispatch runs on rules and WIP bubbles anyway. Dispira re-optimises the dispatch list every few minutes under reticle, chamber and qualification constraints, weighted by live yield risk, and the fab twin checks the plan for cycle-time and yield effect before the AMHS moves a carrier.

  • Constrained optimisation across the whole WIP, not one bay
  • Hot lots and yield-risk lots weighted explicitly
  • Dispatch plan validated on the twin before commit
twin.fabtwin SUCCEEDED
Rehearse the dispatch, then move the lot: signals watched and recipes moved
SignalWatchesMoves
WIP by stepLive from MESDispatch list to qualified chambers
Reticle and chamber stateTool and qualification statusRouting within constraints
Predicted cycle timeTwin simulation of the planPlan accepted or re-optimised
Segments

Where fabs start

Logic and foundry, memory, analog and mixed-signal, specialty and compound semiconductor, and new fabs ramping a node. Most fabs pick one module and one wedge, prove the number, then expand.

Advanced logic and foundryLitho-bound, overlay and CD

Advanced logic and foundry

Sub-3 nm, gate-all-around and backside-power nodes where overlay and CD budgets decide yield. Lithera and Vmetra on the litho and etch modules first.

Memory: DRAM, NAND, HBMHigh-volume, 3D complexity

Memory: DRAM, NAND, HBM

High-aspect-ratio etch and deposition uniformity and CMP planarisation on long flows. Vmetra and Scanira where excursions are most expensive.

Analog and mixed-signalMature nodes, long tails

Analog and mixed-signal

Many products, many recipes, few engineers per tool. Virtual metrology and defect disposition to cover more wafers with the same team.

Specialty and compound semiconductorDifferent materials, same loop

Specialty and compound semiconductor

SiC, GaN and photonics fabs with their own defect and uniformity physics. Scanira and Vmetra models trained per process family.

New fabs and node rampsBlind commitments

New fabs and node ramps

Reshored and greenfield capacity ramping under schedule pressure. Fabtwin de-risks the ramp before lots run.

Run timeline · scenario

One scenario run, step by step

Every Waferira run is an ordered, inspectable sequence. This is run_7b2e9c on Module M2 · 300 mm · metal-1 · lot L-48213. Scenario completes in 10 steps with one approval gate. Overlay and CD predicted inside spec, one reticle-repeater signature caught and held for review, dispatch re-optimised, lot released with full genealogy.

run_7b2e9c Module M2 · 300 mm · metal-1 · lot L-48213 illustrative scenario SUCCEEDED
  1. 01 ingest.lot SUCCEEDED 0.7 s

    Fab Orchestrator · Pulled lot L-48213 from fab MES: 25 wafers, 300 mm, metal-1 layer, route, reticle, overlay and CD spec and the standing cycle-time target. Locked the target envelope for the run.

  2. 02 twin.simulate SUCCEEDED 38 s

    Fab Twin · Simulated 64 candidate correctable, recipe and dispatch sets on the as-run fab twin and ranked them on predicted overlay residual, CD uniformity, excursion risk and cycle time.

  3. 03 litho.correctables SUCCEEDED 1 m 20 s

    Litho-and-Overlay · Per-field overlay correctables and a focus-dose trim written to scanner SCN-07 over SECS/GEM after the previous lot's residual trended toward the control limit. Predicted overlay residual back inside spec.

  4. 04 etch.uniformity SUCCEEDED 58 s

    Etch-and-Depo · Chamber B on etcher ETCH-12 showed an edge-fast uniformity drift in FDC. Pressure and RF trims written within the qualified recipe window; predicted CD uniformity recovered.

  5. 05 cmp.removal SUCCEEDED 46 s

    CMP-and-Implant · Downforce and platen-speed trim on CMP-03 against the virtual removal-rate estimate to hold post-CMP thickness and dishing inside the window.

  6. 06 inspect.classify SUCCEEDED continuous

    Defect-and-Inspect · Inline optical, e-beam review and SEM imagery fused at the tool edge. 1,412 events classified, most dispositioned nuisance; one reticle-repeater signature on three dies flagged for review.

  7. 07 vm.score SUCCEEDED 2.1 s

    Metrology-and-Virtual · Virtual metrology scored every wafer at post-etch and post-CMP from tool-sensor and FDC signatures. Two wafers routed to physical metrology on predicted variance; the rest sampled at plan.

  8. 08 approve.human APPROVAL 1 m 04 s

    Fab Orchestrator · The reticle-repeater signature called for a reticle inspection hold and a recipe move outside the qualified window. Held for the module process engineer and approved at 03:14:27.

  9. 09 dispatch.route SUCCEEDED 4.3 s

    Yield-and-Dispatch · Dispatch re-optimised across 1,840 lots in WIP under reticle, chamber and qualification constraints. The lot routed to the qualified chamber with the shortest predicted queue; AMHS move issued to the stocker.

  10. 10 lot.release SUCCEEDED 1 m 05 s

    Quality-and-Conformance · Lot L-48213 moved on: genealogy written (recipe moves, correctables, FDC signatures, VM scores, defect map, approvals) and checked against the layer spec.

Who it is for

Built for the people who run the fab

We have no customer quotes to show yet and will not invent any. These are the three roles in a fab we build for, and the problems they bring to the first meeting.

Fab, Operations or Yield Director

Owns yield, throughput, cycle time, excursion response and cost per wafer.

What this person is dealing with today

  • Reactive process control that lets overlay, uniformity and CMP excursions destroy yield
  • Multi-million-dollar lot scrap from undetected excursions
  • A severe, scarce process and yield engineering shortage that caps the ramp

Process Integration or Module Engineer

Owns litho, etch, deposition, CMP and implant recipes, process windows and APC.

What this person is dealing with today

  • APC, defect, metrology and MES siloed and reactive across the fab
  • Correctables that lag because metrology is sampled
  • Rule-based dispatch and WIP management that inflate cycle time

Yield, Defect or Metrology Engineer

Owns defect classification, metrology, virtual metrology, yield analytics and wafer and lot genealogy.

What this person is dealing with today

  • Manual, engineer-bound defect classification and SEM review drowning in data
  • Metrology bottlenecks and sampling gaps that miss yield-limiting excursions
  • Genealogy stitched by hand across tool, metrology and MES data
Autonomy

Four levels, set per agent and per tool

A fab does not go from manual APC to unattended control in one step. Waferira makes the level explicit, auditable and reversible at any time. The first release runs shadow mode, then assist mode, then graduated autonomy for low-risk APC, defect and metrology loops.

Autonomy levels and the human role at each
LevelWhat the agent doesWhat the human doesWhere it sits in a pilot
L1 · AdvisoryRecommends recipe moves, dispositions and dispatch, with citationsEnters every change manuallyShadow mode, first on the design-partner cell
L2 · SupervisedProposes a recipe write or hold; it executes on approvalApproves each move in the review consoleAssist mode, where accuracy and ROI are proven
L3 · BoundedWrites inside the qualified recipe window, tool-state checks and OCAP linkageApproves holds, out-of-window moves and lot releaseGraduated autonomy for low-risk APC, defect and metrology loops
L4 · Qualified loopsRuns a qualified loop without prompting, inside its envelopeSets the envelope; reviews the shift recordPlanned; reserved for loops the fab has qualified
Pricing

Priced per module, per fab, per group

Land on one workflow with a measured baseline. Expand by module, tool fleet, fab and autonomy level. Outcome components are available on yield-point value, excursions and cycle time. Annual prepay carries a 15 to 20% discount.

Billing period
Module $30,000 per process module or tool fleet / month · billed monthly

APC, defect or virtual-metrology AI for one module: litho, etch, deposition or CMP. For fabs validating ROI on the wedge, IP-isolated from day one.

  • One module or tool fleet, one agent
  • Fab-edge inference node included
  • SECS/GEM, APC, inspection and metrology connectors
  • Run log, IP-isolated audit trail, lot genealogy
  • Business-hours support
Start a pilot
Enterprise Custom land $2M to $20M ACV

Multi-fab IDMs and foundries standardising on Waferira, with custom process, device and yield models and a managed fab-edge fleet.

  • Multi-fab fleet management
  • Custom process, device and yield models
  • Fab-edge fleet with on-prem control plane
  • Group autonomy policy and approval chains
  • SLAs, SSO and RBAC, dedicated engineer
Contact us
FAQ

Straight answers

The questions fab directors and process engineers ask in the first meeting.

Yes, over SECS/GEM, but only inside the qualified recipe window for that tool, with per-parameter limits and tool-state checks, and only at the autonomy level your fab has set. Level 1 is advisory: Waferira recommends and an engineer enters everything. Design partners start there, in shadow mode.

Get started

Name the module where excursions cost the most

Start with one process module or tool fleet and one measurable baseline. A paid, IP-isolated pilot on defect classification, virtual-metrology-driven overlay and CD control or uniformity APC shows the number before you commit further.